Method for asynchronously transmitting a serial data

ABSTRACT

A method is proposed for asynchronously transmitting a serial data comprises steps of: providing a first signal and a second signal, the first signal and the second signal having a state in a first interval; and keeping the state of the first signal and changing the state of the second signal into another state in a second interval for transmitting the serial data.

FIELD OF THE INVENTION

[0001] The present invention is related to a method for asynchronouslytransmitting a serial data, and more particularly to transmit the serialdata by way of the alternation of two signals.

BACKGROUND OF THE INVENTION

[0002] Generally, the digital data transmission includes two ways ofserial and parallel. For example, the transmission for a printer isparallel and the transmission for a mouse (or a modem) is serial. Thespeed of serial data transmission is slow but suitable for the longdistance transmission. On the contrary, the speed of parallel datatransmission is fast but just only for the short distance transmission.The kernel according to the present invention is the improvement ofserial data transmission.

[0003] The well-known serial data transmission is RS232. The synchronoussignal between a peripheral device and a computer must be get firstbefore the real data transmission. After the real data transmission,there is a serial ending bits yet to be send to confirm for finish. Thiskind of serial data transmission is suitable for the data transmissionof single-end devices, and it is not only slow but also unable tosupport the network data transmission.

[0004] Speaking to the network data transmission, the RJ45 connector isthe general type. The signal line of RJ45 connector usually has 8 pins.For the sake of the network data transmission, a communication protocolsuch as TCP/IP may be used. Therefore, the RJ45 connector with acommunication protocol is not suitable for the control of simple devicessuch as the control of family electrical goods.

SUMMARY OF THE INVENTION

[0005] An object of the present invention is to provide a method usingtwo signal lines to perform the asynchronous transmission of serialdata.

[0006] Another object of the present invention is to provide a networkdata transmission based on the two signal lines.

[0007] Another object of the present invention is to support the fardistance data transmission with high speed and without the frequencybase.

[0008] According to the present invention, a method for asynchronouslytransmitting a serial data comprises steps of:

[0009] providing a first signal and a second signal, the first signaland the second signal having a state in a first interval; and

[0010] Keep the state of the first signal and change the state of thesecond signal into another state in a second interval for transmittingthe serial data.

[0011] In accordance with one aspect of the present invention, the stateof the first signal is a voltage level having a high voltage and a lowvoltage.

[0012] In accordance with one aspect of the present invention, the stateof the second signal is a voltage level having a high voltage and a lowvoltage.

[0013] In accordance with one aspect of the present invention, thestates of the first signal and the second signal include four forms. Thefirst form and the second form are corresponding to a first data and asecond data and the third form and the fourth form is corresponding to abit content.

[0014] In accordance with one aspect of the present invention, the firstform is that the first signal and the second are at a high voltagelevel.

[0015] In accordance with one aspect of the present invention, thesecond form is that the first signal and the second are at a low voltagelevel.

[0016] In accordance with one aspect of the present invention, the thirdform is that the first signal is at a high voltage level and the secondsignal is at a low voltage level. The bit content of the third form is0.

[0017] In accordance with one aspect of the present invention, thefourth form is that the first signal is at a low voltage level and thesecond signal is at a high voltage level. The bit content of the fourthform is 1.

[0018] In accordance with one aspect of the present invention, asequence for transmitting the serial data is:

[0019] A,A(D1),A,A(D2), . . . ,A,A(Dn1),B,B(D1),B,B(D2), . . . B,B(Dn2),

[0020] where A is the first data, B is the second data, A(Dn1) is thebit content of the first data, and B(Dn2) is the bit content of thesecond data.

[0021] The present invention may best be understood through thefollowing description with reference to the accompanying drawings, inwhich:

BRIEF DESCRIPTION OF THE DRAWINGS

[0022]FIG. 1 is a timing diagram according to the present invention;

[0023]FIG. 2 is a truth table according to the present invention;

[0024]FIG. 3 is a serial data according to the present invention;

[0025]FIG. 4 is an application example according to the presentinvention; and

[0026]FIG. 5 is a state diagram according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[0027] Please refer to FIG. 1 showing the timing diagram. The data ofA=010 and B=101 will be transmitted by way of two signals +S0 (firstsignal) and −S0(second signal). The truth table is defined in FIG. 2.Referring to the truth table, A=010 and B=101 will be found in FIG. 1.Thus, the two signal lines can be used to transmit two kind (A and B) ofdata.

[0028] At the interval T0, +S0 and −S0 are both at a high voltage level,that is, +S0=1, −S0=1, while the first data “A” will be indicated.

[0029] At the interval T1, +S0=0, −S1=1, while the bit content “0” willbe indicated. That is, the intervals T1 and T2 obtain that the bitcontent of first data A is “0”.

[0030] As well as, the intervals T2 and T3 obtain that the bit contentof A is “1”, while the intervals T4 and T5 obtain that the bit contentof A is “0”. Totally speaking, A=010. Certainly, B=101 may be found atthe interval T6,T7,T8,T9,T10,T10 and T11.

[0031] Observing to FIG. 1, the change rule of signals +S0 and −S0 is:

[0032] The two signals cannot change at the same time.

[0033] For example, 00 can change to 01 or 10, but cannot change to 11.Then 01 can change to 11 or 00 but cannot change to 10. It means thatjust one of two signals can change at the next interval. Secondly, Thedata will transmit without a clock. Then the transmission speed isflexible. It means that the data transmission is without fixing on afrequency. Certainly, in addition to the high voltage level and the lowvoltage level, the presentation for signals can be other states, forexample the states of light ON and light OFF.

[0034] Certainly, this signal transmission method can implement to thestorage format of storage devises such as a magnetic disk and a compactdisk (CD), etc. Using two tracks as the two signals +S0 and −S0, a datamay be stored. Since the data interval may be flexible, the outsidetracks will store more data. Therefore the capacity of disk willincrease.

[0035]FIG. 3 describes the serial data format. The data length of A isn1, while the data length of B is n2. The two data lenght may be equalor not, and their value may be 1 at least. During the transmission ofthe serial data, all bit contents of the first data A is transmittedtogether. And all bit contents of the second data B is also transmittedtogether. The data length is easy to detect as long as a counter isdesigned at the receiver. When the data type is changed, such as Achanges to B the data length can be counted.

[0036]FIG. 4 is an application example. The asynchronous transmissionmethod according to the present invention can be used to themicroprocessor data transmission. The signal +S0 and −S0 may used todefine an instruction table. The micro-processor may decode a commandand a data according to the instruction table. For example:

[0037] When A has 1 bit, processor ON and OFF are defined.

[0038] When A has 3 bits, 8 registers are defined, while B has 8 bitsused to indicate the content of these registers.

[0039] When A has 16 bits, 64 k memory addresses are defined, while Balso has 8 bits but used to indicate the contents of these memoryaddresses.

[0040] According to the instruction table, the micro-processor may turnOFF by way of sending A=1. If the data FAH (Heximal) want to store intothe second register, send A=010 and B=11111010. If the data AAH want tostore into the memory address F000H, send A=1111000000000000 andB=10101010. Therefore, the transmission method according to the presentinvention is flexible for the transmission of pure data, command data oraddress data depending on the difinition in the instruction table.

[0041] In addition, this invention may implement to the network datatransmission. For example, the first data A may be used to defineclients, and the second data B may be used to define the transmissiondata, which may be a command or a pure data. Comparing to the skill inprior arts, the flexibility and expansibility according to the presentinvention is obvious.

[0042] Please refer to FIG. 5 showing the hardware implementation. Thedigital circuit may be designed according to the state diagram in FIG.5. In principle, if a state is “00”, then the next state can not be“11”; if a state is “10”, then the next state can not be “01”. So, thenext sate of “01” can not be “10” and that of “11” can not be “00”. Thedecoder need not another clock because the clock can be obtain from theAND operation of the two signal +S0 and −S0. Certainly, there is noproblem of clock delay during the data transmission.

[0043] The advance of the present invention is as follows:

[0044] 1. The asynchronous transmission of serial data performs with twosignal lines. The data length of serial data may be long or shortdepending on the design.

[0045] 2. The data transmission is flexible, expansible and suitable forthe far distance communication.

[0046] 3. The method also has the function of network data transmission.It is a so-called universal data transmission method. The speed may befast or slow. There is no need for any extra frequency base.

[0047] While the invention has been described in terms of what arepresently considered to be the most practical and preferred embodiments,it is to be understood that the invention need not be limited to thedisclosed embodiment. On the contrary, it is intended to cover variousmodifications and similar arrangements included within the spirit andscope of the appended claims which are to be accorded with the broadestinterpretation so as to encompass all such modifications and similarstructures.

What is claimed is:
 1. A method for asynchronously transmitting a serialdata, said method comprising steps of: providing a first signal and asecond signal, said first signal and said second signal having a statein a first interval; and keeping said state of said first signal andchanging said state of said second signal into another state in a secondinterval for transmitting said serial data.
 2. A method according toclaim 1 wherein said state of said first signal is a voltage levelhaving a high voltage and a low voltage.
 3. A method according to claim1 wherein said state of said second signal is a voltage level having ahigh voltage and a low voltage.
 4. A method according to claim 1 whereinsaid states of said first signal and said second signal include fourforms; said first form and said second form is corresponding to a firstdata and a second data; and said third form and said fourth form iscorresponding to a bit content.
 5. A method according to claim 4 whereinsaid first form is that said first signal and said second are at a highvoltage level.
 6. A method according to claim 4 wherein said second formis that said first signal and said second are at a low voltage level. 7.A method according to claim 4 wherein said third form is that said firstsignal is at a high voltage level and said second signal is at a lowvoltage level; said bit content is
 0. 8. A method according to claim 4wherein said fourth form is that said first signal is at low voltagelevel and said second are at a high voltage level, and said bit contentis “1”.
 9. A method according to claim 4 wherein a sequence fortransmitting said serial data is: A,A(D1),A,A(D2), . . .,A,A(Dn1),B,B(D1),B,B(D2), . . . B,B(Dn2), where A is said first data, Bis said second data, A(Dn1) is said bit content of said first data, andB(Dn2) is said bit content of said second data.